How to draw the state diagram for a divide by 5 circuit in FSM

[SKS]

How draw the state diagram for a divide by 5 ckt????

 

[A.Anand Srinivasan]

Re: Problem in FSM

tell about the input and output... and the constraints on the input and output.... make ur question a little more clear if possible........

 

[SKS]

Re: Problem in FSM

Input is a continuous bit stream and the output is also a continuous bit stream

 

[A.Anand Srinivasan]

Re: Problem in FSM

what i wanted to know is if the input is say some 01110100101010 then what is the output because for divide by 5 some count the number of 1's some the no of 0's and some will output the 5th bit etc etc...

 

[kpsai26779]

Problem in FSM

Hi SKS,

Can you explain ur problem in detail, like ur sequence is finite sequence (fixed length) or infinite sequence.

if u r giving example then it will be very helpful to answer ur question

 

[SKS]

Re: Problem in FSM

ok...
suppose input : ....1011011010 (LSB first)
output : .....1001001000
so whenever it encounters a sequence a multiple of 5 it gives output 1...

 

[A.Anand Srinivasan]

Re: Problem in FSM

check this out...

 

[kpsai26779]

Problem in FSM

Hi anand,

ur FSM is working good for 101, 1010 but not 1111, 11110

Thanks & Regards

 

[A.Anand Srinivasan]

Re: Problem in FSM

the user has said that he wants to detect 101 and 1010 so when as you said if 1111 or 11110 occurs you would find that it has gone to state S2 which considers that a 1 has occured and for the latter case to state S3 which considers an 10 to have occured so it will work fine....

 

[kpsai26779]

Problem in FSM

Hi anand,

can you tell me when will o/p become 1 other than transition from S3 to S0

 

[A.Anand Srinivasan]

Re: Problem in FSM

for no other transition the output will become 1.... the 1 represents the occurence of 101 or 1010....