How to do in place optimization (IPO)?

[DarlingBoy]

Who can tell me how to do IPO. THX!

 

[semiconductorman]

Re: How to do IPO?

what is IPO??????

 

[xv_ning999]

How to do IPO?

in place optimazation

 

[sp_sara]

Re: How to do IPO?

you should use IPO for these improvements:
1-Reduce path delays
2- Improve transition times
3- Correct capacitance violations
if you use SoC encounter as a physical designer tool you can do this step in silicon virtual prototyping flow,hiararchical floorplanning,block implementation and top level implementation.
after placement you can you IPO for insetring buffer and remapping the network to meet timing requirements.

 

[amara]

Re: How to do IPO?

IPO is In place Optimization it does the timing anlysis it reduces the setup and hold vilotions based on upsize or down sizes the buffers

 

[k_vlsi]

How to do IPO?

Hi
In DC you can use the command
"optimize_design -in_place" for IPO ..

hope it helps

rgds
k_vlsi

 

[smith_kang]

Re: How to do IPO?

Hi,
It depends where or at which step in the flow you want to do IPO. Basically after placement of the Macro and std cell you can do IPO which is preCTS IPO bcause there is no information about clock tree. After building Clock tree you can again do IPO which is postCTS IPO.
The steps in IPO are,
1 Reduces Area (if mentioned)
2 Reduces WNS & TNS (Buffer insertion, Deletion, Upsizing, Downsizing )
3 Reduces DRVs
4 Try to fix critical path.

Hope it answers your query.