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How to do a fault simulation with verifault-XL?

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xxcxy

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Example

Hi!

Could anybody send me an example or a paper that shows me how to do a fault simulation with verifault-XL?

thanks


Make a proper subject
/Cl
 

wmclearlake

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Re: Example

Search Google you will find a lot of paper
 

heartfree

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Example

what's fault simulation???
Did you mean code coverage?
thanks.
 

ThaiHoa

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Re: Example

"verifault-XL" It looks strange! is it similar to Verilog HDL?
 

khorram

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Re: Example

See the following PDF file:
As it mentioned, you can see Cadence site to get more information.

Regards,
KH
 

seasonyangd

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Re: Example

heartfree said:
what's fault simulation???
Did you mean code coverage?
thanks.
Fault simulation is a concept coresponding with DFT/ATPG. YOu can search it in google.
 

gerade

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Re: Example

fault simulation seems to be ancient things, and usually very time consuming. I just doubt the meaning for it today.
 

tutx

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Re: Example

heartfree said:
what's fault simulation???
Did you mean code coverage?
thanks.
Definition of Fault Simulation:

It means an "Operation to determine the expected response of a circuit model, in the presence of faults, when a given set of test vectors is applied to its inputs. Fault simulation plays a pivotal role for test vector generation purposes."

For more information, you should search it with google.

Courage,
 

zzy_zy

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Example

I do some research about ATPG, I don't understand why say "fault simulation seems to be ancient things"
 

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