how to detect second rising edge of a periodic signal

[Stefanovic]

Hi everyone
I need to detect the second rising edge of this signal (it's an entry)
i've tried several ways but without succes

how do i do that ?
thanks

 

[deepmak]

Hello ,
just to make sure , you want to detect every second rising edge ? or the second edge in the 6 pulses train ? also does the display start from right to left ? cuz where u point is a falling edge
Regards

 

[rwender]

Are you looking to detect the second 'falling' edge after a missing pulse? The arrow is point towards a falling edge?

 

[TrickyDicky]

your picture is misleading - it points to falling edges.
And at what point does an edge become a second rising edge? every second one? or second one after a given input?

 

[E-design]

If I understand your problem correctly:
Set a timer after each falling edge to time when the next middle of a high bit should occur in the normal input sequence. If you then sample a low you know you are in the gap between the input sequences. Then just count the number of rising or falling edges to detect the one you want.

Maybe you could make the problem more clear.

 

[tancheeseng84]

To detect the edge, you can just register the signal with multiple back to back registers. For rising edge, you can just check for reg [n] & ! reg [n-1]

 

[Stefanovic]

sorry for the misunderstanding
yes i want to detect second rising edge of each 6 pulses train
i'm trying your given solution thanks

 

[tancheeseng84]

I have a second though, the correct implementation should be

having 6 level of edge detection logic of reg[n] & ! reg[n-1]

Hope this help

 

[Stefanovic]

i know that "&" is for concatenation
but i dont know which operator is "!" and what does "reg[n] & ! reg[n-1]" :/

 

[TrickyDicky]

I guess you know VHDL. ttanch posted Verilog, which in VHDL translates to

reg and not reg(n-1);

 

[Stefanovic]

many thanks, yes i do only know vhdl

 

[tancheeseng84]

Thanks Tricky for explanation.
Yes, that is what I means.