Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to design IO cells for ASIC ?

Status
Not open for further replies.

vsrpkumar

Member level 4
Joined
Mar 26, 2006
Messages
74
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,830
IO Cell query

Hi
I have a query.While designing io cell for an asic,i was told to use buffers for driving the signals to other asic.My query is which logic family sholud be used .How to design IO cells.Can anyone give ideas though it is very vast topic.
Thanking you
VSRPKUMAR
 

Re: IO Cell query

hi

IO cells are anlaog parts
you dont need any logic standard cells for designing..

They are just noise supression, high drive speed bufers..


Regards
Shankar
 

IO Cell query

IO cell is interface with external circuit,
normally it can provide esd protection and big drive capability.
the detail requirement depend on the function of the cell
for example the requirement for input cell and output cell is different
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top