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how to design delta sigma ADC

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CISSE

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i have read the allen's book about the ad/da.So i want to design the circuit and simulation for it.but i donnt know how to start.the software i know is cadence and matlab.and i know use the verilog-a to design the DAC and the verilog to decimator and filter.But i am not sure.
Also,can anyone tell me the procedure in detail？

Added after 1 hours 1 minutes:

e.g i have made the schematic for integral,quantizer and verilog-a for DAC.how to connect them and simulate. and can verilog-a describe the quantizer or other?can anybody reply?

CISSE said:
i have read the allen's book about the ad/da.So i want to design the circuit and simulation for it.but i donnt know how to start.the software i know is cadence and matlab.and i know use the verilog-a to design the DAC and the verilog to decimator and filter.But i am not sure.
Also,can anyone tell me the procedure in detail？

Added after 1 hours 1 minutes:

e.g i have made the schematic for integral,quantizer and verilog-a for DAC.how to connect them and simulate. and can verilog-a describe the quantizer or other?can anybody reply?

I'm also begin a SDM ADC now.
Matlab & Spectre are enough, I think.

U need to know the z-domain model about SDM at first.
And begin from the simplest structure is a good choice. Such as a 2nd Order SDM.
We usually realize the z-domain model by switch capacitor structure because the inverting/non-inverting SC integrator can get discrete trans-functions, what is the same SDM required.

after u understand the z-domain model, u'll know why the noise can be shaping.

and, the z-domain model is ideal. many nonideal effect need to be simulate at Matlab.

thanks,YUANHUI
my understanding about SDM is that the STF and NTF is not the same because the path they cross is different.So the signal is just delayed and the inband noise is supressed.
the simulation about SDM in spectre at transistor level is too slow.but i'm not good at matlab.can you tell me how to simulate the ideal and more accurate model od SDM?
and i dont know how to simulate the whole ADC.i mean including the verilog of digitalfilter and veriloga of DAC.i can do it in the spectre.dose it need some additional license or is there any tools? the fast one is better.

how to work with delsig tool in matlab

u just use Matlab Similink tool to model ur ADC and u can calculate requred SNR and ENOB. it will helpfull to simulate complete model of ADC with Matlab. tool are available at Mathworks.com

sdtoolbox

shiveshdubey said:
u just use Matlab Similink tool to model ur ADC and u can calculate requred SNR and ENOB. it will helpfull to simulate complete model of ADC with Matlab. tool are available at Mathworks.com

Hi,shiveshdubey
i just can make the model in simulink,but i know little about the toolbox. i even dont know the procedure about the simulation.can you tell me more detail?

Hi, u just see the Matlab simulink toolbox.there is block available to model ur design like integrator, quantizer, filter and etc.u can use these block to model ur design.

murmann spectre

i have added blocks in my model.but i can change the parameters of the CIC Decimation bolck and FIR Decimation block.e.g.i want to change the Decimation factor (R) of CIC block. maybe somethings should be installed.but i dont know in detail.

murmann sc noise spectre

i followed the simulink demo'dspsdadc' in R14 and try to modify the first FIR Decimation to CIC Decimation.some errors was reported when i started the simultion.but i have no idea about it.
And i think this model is different from what i‘ve designed.my intergal is SC but that is continuous.Also i cannot find out the SC block.And my Fs=256*Fn,So i need the CIC Decimation.but i can't use the CIC What i've mentioned above.

OK.finally,i give up the demo.i download the toolbox from mathworks.there are two toolboxs,delsig and SDtoolbox.it's easy to use the SDtoolbox by adding the path.but i have trouble in delsig.i type the 'delsig' at the Matlab prompt but it dosen't work.

Added after 1 hours 9 minutes:

maybe the delsig cant give the graphic block what SDtoolbox can in the simulink.just open the *.m and simlution it.am i right?

cic spectre pdf

CISSE said:
OK.finally,i give up the demo.i download the toolbox from mathworks.there are two toolboxs,delsig and SDtoolbox.it's easy to use the SDtoolbox by adding the path.but i have trouble in delsig.i type the 'delsig' at the Matlab prompt but it dosen't work.

Added after 1 hours 9 minutes:

maybe the delsig cant give the graphic block what SDtoolbox can in the simulink.just open the *.m and simlution it.am i right?

use delsig toolbox to calculate SNR using function "simulateSNR" and similarly u can simulate ur delta sigma converter using function "simulateDSM" .use other function similarly. before going to use just read the help of toolbox.

delsig mathworks

Hi,
The link is the Homework projects on Murmann's slides in his classes and could be useful. They are related with data converters. They will help you in your procedure of learning and designing DS ADC and will give you a deep insight through ADC design..

simulatedsm function in delsig

thaks,naalald
hi,shiveshdubey
did you calculate the clockjitter's formula which is label(1) in his IEEE paper?i think the part of 'cos' is cos[pi*f(2t+delta)],not cos(2*pi*f*t).maybe it can be equal approximately but i dont know the reason.

this one is useful

naalald said:
Hi,
The link is the Homework projects on Murmann's slides in his classes and could be useful. They are related with data converters. They will help you in your procedure of learning and designing DS ADC and will give you a deep insight through ADC design..

CISSE said:
thaks,naalald
hi,shiveshdubey
did you calculate the clockjitter's formula which is label(1) in his IEEE paper?i think the part of 'cos' is cos[pi*f(2t+delta)],not cos(2*pi*f*t).maybe it can be equal approximately but i dont know the reason.

Consider the effect of clock jitter on the sampling of the input signal. A sinusoidal time jitter with amplitude a and frequency w will cause a sampling of the input signal at time t to instead occur at time t+asinwt. The effect is the same as if the input signal Acoswot were instead Acos[wo (t+asinwot)]. This can also be written in the form Acos(wo t+awo sinwt), which is recognizable as the expression for FM modulation.

i can't understand your meaning clearly.

is that

and then,sin(x)=x if x is very little.but i can't understand why the part of cos() is equal.

the second question is what's the difference between discrete integrator without and with delay.i just know the one without delay.

i am studying the SD2mod.mdl of the SDtoolbox.the third question is the ADC-DAC block.what's DAClevelREAL and the selector after it?please tell me if someone knows.

this is included demo for you.

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