how to design a frational divider?

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Hi,
How to design a frational divider? Example, I need a 256/372 frequency, how to do it?
 

Design a special PLL for your design.
Or
Try to find the min frequency which can be divided into the 256X and 372X. Divide it to two clock. Then make a sync signal between the two clock domains. Maybe you can use this signal.
 

But circuit is digital, and PLL not available. Could you figure it more detail. Thanks!
 

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