How to design a floating point multiplier?

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atuo

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book floating point multiplier

How to design a floating point multiplier?
 

could u please specify more about the specifications of this multiplier ? .. also, what language are you using ? .. VHDL or Verilog ? ..
 

we want to use verilog
 

try this link:

**broken link removed**

it contains a full design and documentation of a floating point multiplier ..

Several cores are provided in Verilog, Vhdl, C, and Python. If you don't see the configuration you need, chances are the designers (as they claim) can easily generate it for you.
 

hi,
the most easy way to design a floating point multiplier is to use synopsys designware floatpoint lib, high performance you can easy get.
 

FPU multiplier is a very simple, you can get it data flow from any comuter book about organization and architecture .


Bgs!
 

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