How to design a divider to divide a signal by 2.5?

[nxing]

Hi,

I need to design a divider to divide the signal by 2.5 ( the input signals are at around 4GHz), I would prefer the injection lock divider. Does anybody have any idea how to design that? or can refer to any papers regarding this matter?

Thanks

Norman

 

[byteptr]

Re: divide by 2.5

I think is easier divide by 5 (4/5 = 0.8) and then multiply by 2 (0.8*2 = 1.6) with a PLL. A fractional PLL may help you

 

[edf]

Re: divide by 2.5

You will need an exclusive or gate followed by a divide by 2 with the output of the divider fed back into the second input of the exclusive or.