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if you dont care the clock jitter, the most easy way is to divide the source clock by 15 and 16 alternately.
For example:
15.8 = 15*0.2+16*0.8, you can divide 20 source cycle by 15, then 80 source cycle by 16, then repeat...
I havent tried it because right now i have no time, but one possible way way i think you can do is : " Write a C++ program to approximate the inverse of 15.8 by the series of power of 2 with integer coefficients". After that, just shifting and multiplying. Hope my idea is not wrong.
You should multiply your frequency by 5 and then divide by 79. You will have a divide by 17.8. If you use FPGA DLL you can use this approach. First multiply by 4 and then divide by 63. then you will get a divide by 15.75.
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