How to design a comparator N-bit with lowest cost?

[win3y]

Hi everybody;

Is there any way to design a comparator N-bit with lowest cost?

The comparator I made as following:

input [N - 1:0] INP0, INP1;
output [N - 1:0] MIN; 
assign MIN = (INP0 < INP1)? INP0:INP1;

I wish to make another comparator that occupies smaller hardware cost.

Thanks.
W3Y.

 

[mukherjee_debajyoti]

Hi everybody;

Is there any way to design a comparator N-bit with lowest cost?

The comparator I made as following:

input [N - 1:0] INP0, INP1;
output [N - 1:0] MIN; 
assign MIN = (INP0 < INP1)? INP0:INP1;

I wish to make another comparator that occupies smaller hardware cost.

Thanks.
W3Y.

Hi,
There can be another way of implementing N bit comparator.
So 3 possibility will be there in the magnitude comparator

a) INP0 = INP1
b) INP0 > INP1
c) INP0 < INP1

a) INP0 = INP1

PI (INP0 xnor INP1) i ranging from 0 to N-1

so for 4 bit number , INP0 = INP1 if
(INP0[3] xnor INP1[3]) and (INP0[2] xnor INP1[2]) and (INP0[1] xnor INP1[1]) and (INP0[0] xnor INP1[0]) = 1

b) INP0 > INP1

(INP0[N-1] and ~INP1[N-1]) or [(INP0[N-1) xnor INP1[N-1]) and (INP0[N-2] and ~INP[N-2])] or [(INP0[N-1) xnor INP1[N-1]) and (INP0[N-2) xnor INP1[N-2]) and (INP0[N-3] and ~INP[N-3])] or ..


C) INP0 < INP1 ,
(~INP0[N-1] and INP1[N-1]) or [(INP0[N-1) xnor INP1[N-1]) and (~INP0[N-2] and INP[N-2])] or [(INP0[N-1) xnor INP1[N-1]) and (INP0[N-2) xnor INP1[N-2]) and (~INP0[N-3] and INP[N-3])] or ..

I am not very sure , if you code the above comparator logic using verilog , how much difference will be with your code, as per the hardware consumption is concerned.

You can try my logic and synthesize the verilog code and check the result.

I think this may reduce the hardware cost , as the outcomes in every stages are pre-calculated

Please let me know the result..

Thanks
Deb










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[win3y]

Thank you for your post. I also vote "helped" for you.
This time I am doing something to reduce the hardware cost, not only these comparators.

W3Y