i recently came across a question where a waveform is given which constitutes of a clock a input and an output. we are asked to design the circuit for it.
the waveform is like the clk is running, and after the posedge of the clock the input is on for 3 clock cycles and the ouput is on after the posedge of the input and is on for one complete clock cycle and its off untill there is a new posedge of the input.please help me with these kinds of problems.
That’s a problem of Sequential Circuits. There is a clock signal and all the internal state changes only on a clock edge. The basic storage element in sequential logic is the flip-flop.
Read some theory: