How to design a ADC in order to make it use full 10 bit ?

[nijMcnij]

ADC question

hello all,

i am designing a 10bit SAR (charge redistribution) ADC.

the range of the signal to be converted is from 1,65V to 3,3V.

in this ADC, i am using 3,3V as the reference voltage for the comparator and i switch the capacitors (during bit cycling) between gnd and 3.3V.

in doing so , i am dividing the voltage range between 0 and 3,3V to 2^10 levels.

so i am loosing 2^5 levels since my input signal range is between 1,65 to 3,3V.

how can i design the ADC inorder to make it use the full 10 bit resolution for the voltage range 1,65 to 3,3V

many thanks

 

[willyboy19]

Re: ADC question

There are two possible solutions to your question:

1) Use 1.65V reference in stead of 3.3V, if you have a nice and clean 1.65V on-chip;

2) Embed a built-in 2x switched-capacitor gain stage with your charge-redistribution architecture to fully utilize the 3.3V reference voltage range.

 

[alino]

Re: ADC question

thanks