Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to define two separate asynchronous clocks in a design?

Status
Not open for further replies.

vahid_roostaie

Newbie level 5
Joined
Sep 30, 2005
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,384
I have two seperated asynchronous clocks in my design.I used synchronizers and the other needed techniques for these two clocks boundary and don't have any problem in design.

I just want to know how can I define these two clocks. with two seperated create_clock commands?.

I want to use set_fix_hold,set_input_delay,set_output_delay,set_propagated_clock commands how should I use them for two seperated clocks?should I use any of these commands seperately for each clock?

I want to insert clock gating in my design with set_clock_gating_style and insert_clock_gating commands.how can Insert clock gating for two seperated clocks.

thanks alot
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top