#--------- Memory Address Assignments for hierarchy
#
#----- ublazePCIe_hier/axi_pcie_0
assign_bd_address [get_bd_addr_segs {M00_AXI_0/Reg }]
set_property offset 0xC2000000 [get_bd_addr_segs {ublazePCIe_hier/axi_pcie_0/M_AXI/SEG_M00_AXI_0_Reg}]
set_property range 8K [get_bd_addr_segs {ublazePCIe_hier/axi_pcie_0/M_AXI/SEG_M00_AXI_0_Reg}]
#
#
#----- ublazePCIe_hier/microblaze_0
#----------- Data ------------------
#-- SLMB
set_property offset 0x40000000 [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_dlmb_bram_if_cntlr_Mem}]
set_property range 32K [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_dlmb_bram_if_cntlr_Mem}]
#
#-- CTL0
assign_bd_address [get_bd_addr_segs {ublazePCIe_hier/axi_pcie_0/S_AXI_CTL/CTL0 }]
set_property offset 0x10000000 [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_axi_pcie_0_CTL0}]
set_property range 8K [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_axi_pcie_0_CTL0}]
#
#-- BAR0
assign_bd_address [get_bd_addr_segs {ublazePCIe_hier/axi_pcie_0/S_AXI/BAR0 }]
set_property range 8K [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_axi_pcie_0_BAR0}]
set_property offset 0x80000000 [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_axi_pcie_0_BAR0}]
#
#-- M00_AXI_1
assign_bd_address [get_bd_addr_segs {M00_AXI_1/Reg }]
set_property offset 0xB0000000 [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_M00_AXI_1_Reg}]
set_property range 8K [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Data/SEG_M00_AXI_1_Reg}]
#
#----------- Instruction -----------------
#-- SLMB
set_property offset 0x00000000 [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Instruction/SEG_ilmb_bram_if_cntlr_Mem}]
set_property range 32K [get_bd_addr_segs {ublazePCIe_hier/microblaze_0/Instruction/SEG_ilmb_bram_if_cntlr_Mem}]