how to define an ideal switch in the Hspice

[winsonpku]

hspice ideal switch

i am designing a switched-capacitor circuit,to ease the design,i want to use the ideal switch,who can tell me how to do it?! thanks first!

 

[Btrend]

hspice switch

check this

 

[jiangwp]

ideal switch hspice

you can use the G element. such as:

Gnmos d s VCR NPWL(1) g s LEVEL=1 0.4v,150g 1v,10meg 2v,50k 3v,4k 5v,2k

the meaning is referenced by Hspice manual.

 

[ezt]

switch hspice

Hi.
as jiangwp said, ideal switch is defined as follows :

gsw sin sout VCR PWL(1) clk 0 0,1e7 vdd,1m

where "sw" is the arbitrary name of our switch. "sin" and "sout" are input and output nodes of the switch (however, there is no difference between input and output nodes so you can change the sequence of their difinition.) "VCR" is a keyword which you must write in the switch syntax. "PWL" difines the shape of variation between Ron and Roff of the switch. "clk" is clock of the ideal switch and the following "0" is the reference of "clk". "0,1e7" means, when signal is greater than (or equal to) 0 V the resistance of the switch equals 1e7 ohms and "vdd,1m" means, when signal goes to vdd (or become greater than that) the resistance of the switch equals 1m ohms.

Regards,
EZT

 

[layes2]

ideal switch in hspice

vcvs in analogLib

 

[kienhuy]

how to model ideal switch in hspice

You can also use SWITCAP to design a SC circuit. This program uses all ideal elements and is good for a first cut design.