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How to decide the skew value in a given design?

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designer_ec

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skew value

Hi
How to deside the skew value for perticuler design in perticuler technology.I mean on what basis skew value deside. And there is any relation for skew value to clock frequency.and there is any relation skew,setup and hold times.

Thanks
 

uditkumar1983

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Re: skew value

Hi
If there is +ve skew then
For Clock Period Tw >=Tp + Tcomb + Tsu - Tskew
But you can increase skew for incresing clock frequency only upto when this condition is satisfied
Tp + Tcomb >= Thold + Tskew ( if u r trying to increase skew beyond this limit then there is hold time violation problem will occur )
If there is -ve skew then
For Clock Period Tw >=Tp + Tcomb + Tsu + Tskew
you can increase skew for decreasing clock frequency , there is no limitation because this condition will always satisfied
Tp + Tcomb >= Thold - Tskew .
But this condition must be satisfied else there is setup time violation will occur.
 

roy_ece

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Re: skew value

hi ,
Let us first Understand what positive skew and negative skew mean.

Suppose we have a register to register path with a combi logic (combi cloud ) between them.
Irrespective of setup or hold analysis , if the 2nd register receives clock after 1st register ,then it is case of positve skew .

If the 2nd register receives clock before the 1st register ,then it is the case of negative skew.

Based on this concept let us modify the basic for setup and hold equations so that there are no violations:

setup analysis:(ignoring launch clock path and capture clock path)
+skew:

T(clk_q )+T(combi)+Tsetup<=Time period+Tskew.

-skew:
T(clk_q )+T(combi)+Tsetup<=Time period -Tskew.

Hold analysis:(ignoring launch clock path and capture clock path).

+skew:
T(clk_q )+T(combi)>=T hold+Tskew.

-skew:
T(clk_q )+T(combi)>=T hold-Tskew
 

designer_ec

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Re: skew value

Thanks friends, I able to clarify my basic doubt from your response.
 

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