ruwan2
Member level 5
Hi,
I am new to Modelsim. I find there is a test bench template, but I don't find how to create it. Please see the picture. No matter what I add to the
'Design Unit Name', the 'Next' tab never turns to black.
The small Verilog module has compiled successfully.
Could you tell me how to create a test bench using the wizard for Verilog code?
Thanks,
I am new to Modelsim. I find there is a test bench template, but I don't find how to create it. Please see the picture. No matter what I add to the
'Design Unit Name', the 'Next' tab never turns to black.
The small Verilog module has compiled successfully.
Could you tell me how to create a test bench using the wizard for Verilog code?
Thanks,