How to convert the db file gtech.db to gtech.v format?

[rsrinivas]

Hi all
i need to convert the db file gtech.db to gtech.v format
is it possible?
pls let me know
thanks in advance

srinivas

 

[research235]

db format to verilog

hello Srinivas

I have nver read any where if this is possible, The reason wat I could deduce is .. The bd format which we get after synthesis steps involves various other details of timing and delay. But the verilog r VHDL file do not involve all these details amy be tat is the reason we have the option of writing out both .db and .v files ..

This is according to me .. but please let me know if i am wrong .

suresh

 

[rameshsuthapalli]

db format to verilog

hi All,

the gtech.db is the genric technologie librarie.in the directorie of the synthesis tool you can also fine the gtech.v/gtech.lib .
if you are talking about the netlist write in the formate of .DB the you can read again it in the synthesis tool and link it and you can now write out the .V netlist file from the tool.i think it will solve your problem.

BR,
Ramesh.S

 

[sumit_techkgp]

db format to verilog

Ask Synopsys. They can answer u better.
Sumit

 

[Shurik]

Re: db format to verilog

Hi!!!
in dc_shell

read -format db {name.db}
write -format verilog -output name.v

 

[sudvit]

Re: db format to verilog

U can never convert .lib format to verilog(.v) format in Design compiler.u can convert into vhdl format..

 

[iwpia50s]

Re: db format to verilog

Shurik is correct, however, the output verilog will be in gtech library.