# How to confirm the w/l of the output stage?

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#### wjxcom

##### Full Member level 5
Hi, all: please look at the circuit. though there have already labeled the w/l of the transistor Q10 and Q11, I do not konw how to confirm the w/l of Q10 and Q11.

I think the external load resistor RL determines the load current and thus the dimensions of the output devices Q10 and Q11. Assume the resistance of the load RL that is ac coupled to the output of the op-amp is 50Ω, Then for an output signal with 2-V peak-to-peak voltage swings, the op-amp output varies from 0.5 to 2.5v,

But now how to confirm the maximum source and sink current of Q10 and Q11?

Help me plz, thanx!!!!

#### philipwang

Dear wjxcom,

If output swing is adequate in your amplifier, then we should consider the output rising and falling time, this is dertermined by the output capacitor and average output source/sink current, right? so I don't know why did you need maximum source/sink current? By the way, why did you select so large a compensation capacitor? this will affect output rising/falling time and reduce the unit-gain bandwidth, right?

Best regards,

wjxcom said:
Hi, all: please look at the circuit. though there have already labeled the w/l of the transistor Q10 and Q11, I do not konw how to confirm the w/l of Q10 and Q11.

I think the external load resistor RL determines the load current and thus the dimensions of the output devices Q10 and Q11. Assume the resistance of the load RL that is ac coupled to the output of the op-amp is 50Ω, Then for an output signal with 2-V peak-to-peak voltage swings, the op-amp output varies from 0.5 to 2.5v,

But now how to confirm the maximum source and sink current of Q10 and Q11?

Help me plz, thanx!!!!

A398899093

### A398899093

Points: 2

#### wjxcom

##### Full Member level 5
Hi philipwang: I think all of the MOS transistor of an opa should be in saturate region, right? and the saturate region has a relation with the current that pass the MOS transistor, right?

Q11 pass the source or sink current, Q10 and Q11 should be in saturate region, so I must confirm the source or sink current. At the same time, the source or sink current has relation with the load resistance RL, so for an output signal with 2-V peak-to-peak voltage swings, the op-amp output varies from 0.5 to 2.5v, and RL is 50Ω, how can I confirm the w/l of Q10 and Q11?

Or is there have other way to confirm the w/l of Q10 and Q11?

#### wjxcom

##### Full Member level 5
Dear all: nobody can help me to resolve this question? or maybe I did not expatiate my question detailed?

A398899093

### A398899093

Points: 2

#### philipwang

Dear wjxcom,

Yes, you are right. But output transistor must be in saturation region? Idealy there is always one transistor in cut off region so that current efficiency is largest. That is, PMOS is open when charge output load and at the same time NMOS is cut-off. NMOS is open and PMOS is cut-off when load dischargs. Right? So we are interested in the drive capacitance of output satge not foucus on its state.

Best regards,

wjxcom said:
Hi philipwang: I think all of the MOS transistor of an opa should be in saturate region, right? and the saturate region has a relation with the current that pass the MOS transistor, right?

Q11 pass the source or sink current, Q10 and Q11 should be in saturate region, so I must confirm the source or sink current. At the same time, the source or sink current has relation with the load resistance RL, so for an output signal with 2-V peak-to-peak voltage swings, the op-amp output varies from 0.5 to 2.5v, and RL is 50Ω, how can I confirm the w/l of Q10 and Q11?

Or is there have other way to confirm the w/l of Q10 and Q11?

So select Q11 and Q11 large enough to improve the drive capacitance if no layout consideration.

philipwang said:
Dear wjxcom,

Yes, you are right. But output transistor must be in saturation region? Idealy there is always one transistor in cut off region so that current efficiency is largest. That is, PMOS is open when charge output load and at the same time NMOS is cut-off. NMOS is open and PMOS is cut-off when load dischargs. Right? So we are interested in the drive capacitance of output satge not foucus on its state.

Best regards,

wjxcom said:
Hi philipwang: I think all of the MOS transistor of an opa should be in saturate region, right? and the saturate region has a relation with the current that pass the MOS transistor, right?

Q11 pass the source or sink current, Q10 and Q11 should be in saturate region, so I must confirm the source or sink current. At the same time, the source or sink current has relation with the load resistance RL, so for an output signal with 2-V peak-to-peak voltage swings, the op-amp output varies from 0.5 to 2.5v, and RL is 50Ω, how can I confirm the w/l of Q10 and Q11?

Or is there have other way to confirm the w/l of Q10 and Q11?

#### wjxcom

##### Full Member level 5
Hi, philipwang: yes, there is always one transistor in cut off region.

but how to think about the quiescent current?

#### philipwang

Dear wjxcom,

Performance better quiescent current smaller. So try your best decrease the quiescent current. Idealy it is zero(or just transistor leakage current) if always one
output transistor is cut-off, but actually it is difficult to get this target.
the structure you attached is very good for controlling quiescent current. Other means includes adative load resistor and etc. You can search related IEEE paper.

Regards,

wjxcom said:
Hi, philipwang: yes, there is always one transistor in cut off region.

but how to think about the quiescent current?

#### wjxcom

##### Full Member level 5
Hi, philipwang: It is so kind of you to answer my quesions. I think I have get help from you and I can confirm the w/l of this transistors.

thanx you!!!

#### srivatsan

##### Full Member level 3
I think the following book should help you in designing the W/L of an output stage. I used Class AB with floating current source.

Roubik Gregorian, Introduction to CMOS Op-Amps and Comparators, John Wiley & Sons, Inc., 1999.

I would also glance at Grey & Meyer.

Srivatsan

#### wjxcom

##### Full Member level 5
Hi, srivatsan: the circuit I added to the attachment is from the book "Roubik Gregorian, Introduction to CMOS Op-Amps and Comparators, John Wiley & Sons, Inc., 1999. "

I think in this book in page 345, the equation 8.101 does not show why use "1V" to calculate the sink or source current.

I think you can help me. thanx!!!!

V
Points: 2