How to code SPDIF using Verilog?

[shashi_reddy21]

Does any can give me an idea how to code SPDIF using verilog

 

[spauls]

verilog spdif

Can u please expand what is SPDIF ?

 

[eda_wiz]

s/pdif verilog

https://whatis.techtarget.com/definition/0,,sid9_gci213474,00.html

S/PDIF

S/PDIF (Sony/Philips Digital Interface) is a standard audio transfer file format. It is usually found on digital audio equipment such as a DAT (Digital Audio Tape) machine or audio processing device. It allows the transfer of audio from one file to another without the conversion to and from an analog format, which could degrade the signal quality.
The most common connector used with an S/PDIF interface is the RCA connector, the same one used for consumer audio products. An optical connector is also sometimes used.

 

[funzero]

spdif in verilog

search google for this topic .

 

[dddain_bramage]

Re: verilog

Does any can give me an idea how to code SPDIF using verilog

Like most communication standards, SPDIF has different "layers." On the electrical side, information-bits are encoded in Biphase FM modulation. A google search on that topic will explain the rules of BFM. At the 'frame' level (I'm not sure that's the correct name), the information-bits are grouped into packets of a fixed length (I already forgot the organization.)

And then of course, there are constraints on the signalling speed and actual payload. For PCM-audio payload, the effective sampling-rate is restricted to 1 of 3 choices: 32KHz, 44.1KHz, 48KHz. I'm not sure about Dolby Digital (AC-3) payloads over SPDIF, or DTS payloads over SPDIF. I know consumer DTS supports both 44.1KHz or 48KHz sampling rates (movie-theater DTS is 44.1KHz only.)