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How to choose a topology for bandgap design?

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airace

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Hi guys...
this is in continuum to some Qs i hav been asking...
As part of a ADC/DAC design.....am designing a bandgap ref.

Q: On what basis does decide the topology for a application...
to be precise.......what is the basis for choosing any particular
topology......

(If it sounds dumb....pls excuse....i am inexperienced :? :oops: )

Thx
 

regulated bandgap for airace

To name some.
1. Power Supply Rejection.
2. Integrated noise.
3. Quesent current.
4. Reference Voltage.
5. Stablity
6. Application
7. Settling Time.
...........

Amit
 

ntat ctat current

Amit....
can u tell me what is a zero-order/first order/second order bandgap?

thx,
 

ntat cmos

well i am not sure...but it has to do some thing with the curvature of the output voltage waveform with respect Temperature...
so what is feel that order has to do soem thing with the curvature correction of the output voltage.

since the output voltage of the bandgap has certain dependency on the the temperature (becuase the temperature deviation coefficient of the NTAT and PTAT in itself depend on the temperature). So there will we linear, squre, cube and so on coeffient of temperature in the output refence voltage...so the order uptill which be can make the Reference voltage independent of temperature (removing the dependency with Temp) will be the order of the bandgap reference...

may be some one else can throw more light on it...
Amit
 

Re: Bandgap design

Si bandgap voltage has three term, one constant, one linear and one ln.

Zero Order: no temperature compensation is implemeted and thus is the simplest bias circuit such as a forward-biased diode or zener reference.

First Order:cancel the linear term by combining the PTAT and CTAT. This is what you normally see for a CMOS bandgap.

Second Order: introduce a PTAT^2 term based on First Order reference. This ^2 term cancel the ln term in some degree. The popular Brokaw bandgap belongs to this category.
 

Re: Bandgap design

You may have a look at :
**broken link removed**
 

Re: Bandgap design

Try this link:
**broken link removed**
 

hey airace - let me give you a hint that will make your bandgap work the first time. brokaw.

the brokaw cell depends only on the ratio of the two resistors, and can take a lot of process variation before it is degraded. sure the curve moves a little, but i've seen a lot of brokaw bandgaps that never needed trimming.

widlar is just as good in the sense of being robust, but it has one "absolute value" resistor down in the deltaVbe section that can cause trouble when the fab makes a slow slow run and your ptat current is way too low. in my opinion, brokaw (although it is not fancy) is a very good cell for the first bandgap.

regulated brokaw is even better. let me draw you some pictures - i'll be back in an hour or so.
 

Re: Bandgap design

ok we're in business. i just simmed out two brokaw bandgaps made out of 2n3904 and 2n3906. (yes you could really make these out of your junk box! but with unmatched transistors it would be hard to trim)

i used bjt's because they're simple and not proprietary. i can't give out the mos models i use (chartered semi) so this is good enough. i'd make my mirrors and my diff amp out of long L CMOS if i was really building this.

the first cell is the generic 1:8 brokaw. using 2n3904, it looks like the magic voltage is about 1.09v and i get 3-4mV of variation from 0-80c. not too bad for 5 cent 3904!!

what is bad is line regulation.. in the second sim, i ramp up vcc 0-5v, then put a big step from 5-3v and back. this causes somewhere around 70mV of droop in my bandgap - awww now my 3mV spec is 73mV over supply and temp. no good!

now i turn this into a regulated bandgap in pdf #4. a simple diff amp (Q13-Q14) monitors the collectors of my bandgap core, and outputs to a pnp pass device (Q15). Usually this guy feeds the base of the bandgap core, but here I make a 2:1 divider. the top of the core is at 2x the bandgap voltage, bases of Q1-Q9 ARE the bandgap voltage, and this guy regulates very nicely.

i added the divider to make sure the top of the core was high enough to not saturate Q10-Q11. If you're using MOS, go ahead and make this voltage 200-500mV above the bandgap for low-voltage operation. it doesn't matter, it just gives Q10 Q11 some headroom to work from.

Next, since this bandgap regulates itself, it needs a startup circuit. The amp is happy to regulate 0v in, 0v out so this bandgap will be prone to not starting up unless you avoid that state. I added R6 to prevent a 0v state. here's now

if the bandgap hasn't started up yet, R6-R4-R3 make a divider from Vcc-GND. Now the voltage at the base of the bandgap core is BELOW the bandgap voltage (but not 0v!!!) - this makes the diff amp mad, and it instantly turns on Q15, powering up the core and bringing the bandgap up. Now R6 has no use, since the voltage at the bottom of R6 is too high to satisfy the V=IR of 500k. It leaks a little, but no big deal since it's 500k.

Take a look at the simulations of this guy. First, the magic voltage goes up a little, so we have to trim R2 a little bit higher. This is OK, we have a divider on the bandgap core which is powered from Q15 so Q15 does all the work. Temp performance is much better now that we have a diff amp with gain of 200 inside the loop (it used to be just a diode-connection with gain of... 1!!) Maximum temp variation is 1.1487v at 0C to 1.1493 over 80C - 0.6mV/0.04%/5ppm which is way too good to be true. (FYI - Sims are perfect, don't ever expect sim-performance from parts made on earth.)

But the big reward is in line regulation. I give this bandgap the same voltage step, and it's rock solid!! With only a diff amp and pass pnp we increase PSRR by a huge amount.

Like I said before, implement EVERYTHING but the bandgap bjt in CMOS, and you will have a very small, very high performance bandgap. This is only an example though - there are many other tricks to add in after you have two or three simple ones working in silicon.

Good luck - and let me know if you have questions!
 
Re: Bandgap design

How does one take care of Resistor tolerance and statistical variation in bandgap ?Also ,i would like to know to calculate the value and type of capacitor used at the output of the regulator voltage or bandgap .
 

Re: Bandgap design

bandgap
use opamp to stable
and pnp to generate
 

Re: Bandgap design

use CMOS tech. to design a reference voltage is very popular in these days.
 

Bandgap design

cetc1525,

what's the advantage for using pure CMOS to implement the bandgap if my process has the laternal pnp available.
 

Re: Bandgap design

many book have bandgape design , CMOS bandgap design have
1 use OPA + diode

2 use cascode mos + pnp diode

we usually use cascode mos , becuase no need OPA have small layout
and cascode pmos upp ser size close VDD pmos is "critical mos"
L = 5 Lmin ..

and other pmos can use Lmin , and use cascode only for improve
PSRR ..

but cascode bandgap need Hi vol .. if you Vcc < 3v , it can not be use
 

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