How to choose a combination of PVT ?

[IC_Lee]

Hi, all

I'm a novice at designing analog IC. I have two question here.
I want to know how to choose reasonable combinations of PVT
(process, supply voltage, temperature) .Which combinations are
necessary to run simulation? And then my chip returned from
foundry will work well .

what's the difference between all kinds of process condition
(such as typical, ss , ff , sf, fs , etc.)?

How to modulate your design to adapt to any change of PVT?


Thanks for any reply!

 

[silicon]

I always run three simulations to check circuit.

Typical case: TT, VDD+0%, 40 degree
Worst case: SS, VDD-10%, 125 degree
Best case: FF, VDD+10%, -25 degree

 

[seanwu]

According to the operation conditional, eg. VDD+/-5% is enough.

 

[IC_Lee]

I always run three simulations to check circuit.

Typical case: TT, VDD+0%, 40 degree
Worst case: SS, VDD-10%, 125 degree
Best case: FF, VDD+10%, -25 degree

I also run these three ,but I don't know whether they are enough for all the designs.

 

[arsenal]

I think u'd better try all the simulation corners:

tt + 55
ff - 25
ff + 110
ss+ 110
ss - 25

 

[jordan76]

It depends on both your design and applications.
Actually there is another post discussing this issue if my memory didn't fail me. You can search for it

regards,
jordan76