How to check LDMOS in the saturation region when design a OPA?

[mpig09]

Hi all:

I wish a OPA for a LDO and the OPA operation voltage is
5~20V.

For high voltage, I use LDMOS to design the OPA, but I found there isn't have vdsat parameter in my pdk.

Do you have any suggestion or solution to know the LDMOS is in saturation region or not?

Thanks for your reply.
mpig

 

[erikl]

Check the Id vs. Vds characteristic of your LDMOS for the planned drain current Id. Normally it works in the saturation region if Vds > Vgs .

 

[mpig09]

Hi erikl :

Thanks.

I will do it.

mpig

 

[suman.chahar87]

hi
i am working on si ldmos in ATLAS SILVACO ,it show a warning/error in running time that one contact on both side of junction . so plz tell me whats problem and how can we solve this problem