How to check for the ESD protection of the capacitors

FreshmanNewbie

Member level 5
I have this circuit

I need to check whether my input capacitors C0001-c0004 are protected for ESD events.

My ESD pulse spec: +/-8kV, 2kohms & 330pF. I have taken 130% of this +8kV as my ESD pulse for the worst case calculations.

I am performing the calculations as per this Article - Capacitor as ESD Protection

So, in accordance with the above article,

My calculations are below:

According to the above calculations, my questions :
1. Since the required capacitance is more than the actual capacitance present in the above calculation, does this mean, I should increase the input capacitor capacitance value? Or what does it mean?
2. So, after the ESD event, the capacitors will help to clamp the voltage to 72.512V approx. , & it will be present at Input_P node and will damage the Q0002 transistor, since Q0002 Vce(max) is only 45V. Since, 72.512V > 45V, won't this 72.512 damage the transistor and the other downstream components and also components connected on the Input_P rail?
So, should I focus on the capacitor capacitance value for the ESD calculations or should I focus on the ESD Clamp voltage ? I am confused. Please tell me how to validate my design using the calculation.

Last edited by a moderator:

KlausST

Super Moderator
Staff member
Hi,

as already mentioned in another thread: I don´t like the series connections of the capacitors.
What´s the benefit?

Drawback:
* half the capacitance
* much higher stray inductance by wiring
* unpredictable DC voltage - thus you can´t expect twice overall voltage capability
* bigger in size
* increased assembling cost
* I assume even higher part cost

8kV in a 330pF capacitor may deliver up to 2.64uAs.
push this into a - let´s say - 100nF capacitor then you get a voltage less than 27V.
Means a 100nF ESD capacitor won´t ever see some voltage in the kV range.

Klaus

FreshmanNewbie

FreshmanNewbie

points: 2

FvM

Super Moderator
Staff member
As already mentioned, you can easily limit the voltage to a safe level by increasing the capacitance. Some considerations are unsubstantiated. Q0002 Vce is e.g. limited to a much lower value by a zener diode.

The capacitor series connection remembers me to redundancy requirements in some automotive safety rules.

I believe a TVS diode would be the standard way to protect the circuit.

FreshmanNewbie

FreshmanNewbie

points: 2

ted2

Junior Member level 1
As already mentioned, you can easily limit the voltage to a safe level by increasing the capacitance. Some considerations are unsubstantiated. Q0002 Vce is e.g. limited to a much lower value by a zener diode.

The capacitor series connection remembers me to redundancy requirements in some automotive safety rules.

I believe a TVS diode would be the standard way to protect the circuit.
Just to repeat KlausST's comment about using capacitors as an ESD protection: It is indeed a well-working solution, if the capacitance is sufficient. The easy way of estimating the theoretical maximum voltage is indeed considering the charge transferred. I am using myself the equation Voltage rise at the "capacitively bypased point" = Input voltage * tester's capacitance / the "bypass capacitance". In practice always less due to the energy loss in the series resistance.

I.M.H.O. thus if you can have sufficient by-pass capacitance, you don't need any TVS diode, especially if the capacitors have low inductance (such as the SMD chips always have) and the ground/return path and all involved wiring is done with low inductance/impedance. The component and wiring inductance is important because the rise time of an ESD pulse is very short!

My favorite example is related to an USB 2 connector: +VBUS is best by-passed and protected with a capacitor, but D+/D- lines have to be protected with ESD diodes, as they can't be bypassed by such loads.