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How to change clock frequency?

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dtn_me

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Hi

From a clock generator module, how to generate clocks of different frequencies?
For example, my design has different clock domains at 25MHz,66MHz and 125 MHz.
From the same clock gen, how to generate all these clocks?

Simply, how to increase or decrease clock frequencies?
 

Please give some details about the clock generator module. Manufacturer and part number would help a lot.
 

a very abstract way to answer your query is that inorder to increase the frequency use an PLL, to decrease use an clock divider logic.
 

What device is your clock source? (X'tal, PLL...)
125MHz/66MHz are the key point, find out their relationship coefficient.
 

It is still not clear, but it sounds like you want to generate three clocks (25, 66 and 125 MHz) using a single frequency reference source.

You can use pll's and clock dividers to do this, but only if you can tolerate some error in your generated frequencies. The reason for this is because if you want exact frequencies, you would need to generate a reference clock of 125*66=8250 MHz (!); this is the lowest frequency that can be divided to give you all three frequencies exactly.

So, your first step is to determine how much error you can tolerate on the three clocks. You can then try to find some ratios that will result in a more reasonable reference frequency.
 

You'll need two input clocks, 25 MHz and 66 MHz. Out of 25 MHz, multiply by 5 using a PLL
 

If you can tolerate some error, you can use a single reference.

For example:
Use 25 MHz clock as your reference: 0% error.
Use 5× pll to get 125 MHz: 0% error.
Use 8× pll to get 200 MHz, then ÷3 to get 66.67 MHz: 1% error.
 

Divider | Programmable Counter
 

you can use pll to increase or decrease frequency.

best regards



dtn_me said:
Hi

From a clock generator module, how to generate clocks of different frequencies?
For example, my design has different clock domains at 25MHz,66MHz and 125 MHz.
From the same clock gen, how to generate all these clocks?

Simply, how to increase or decrease clock frequencies?
 

Status
Not open for further replies.

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