Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to calculate the number of clocks required in a design using Xilinx?

Status
Not open for further replies.

lalu

Newbie level 3
Joined
Feb 9, 2008
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,379
in the xilinx simulation hw can i calculate the no of clock cycles required in the design?
plz be quick.
thx.
 

deepu_s_s

Full Member level 5
Joined
Mar 24, 2007
Messages
305
Helped
15
Reputation
30
Reaction score
5
Trophy points
1,298
Activity points
3,021
query

after you synthesized the design, it will give u the operating frequency of your design. From that you can know the frequency of the design
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top