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How to calculate node cap in HSPICE?

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avin11

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When a netlist is extracted for a layout, what does the parasitic capacitances represent? Please check me on this:

- for input caps, it doesn't contain gate cap. but contains all routing caps for that input. When simulated in HSPICE, the gate cap is calculated by the tool and added to the extracted parasitic cap. to form the total node cap for that input node. Is this true?

- the parasitic cap. for other nodes are composed by diffusion caps of drains and sources connected to that node?

- i notice that HSPICE tends to recalculate the diffusion caps for the nodes
again and then adds these calculated values to the corresponding paracitic caps of those nodes to derive the net nodal cap. This would mean that the diff cap. is calculated twice, once by HSPICE and another from the extracted parasitic cap, and thus not accurate. Is this true?

Can anybody please comment on these statements? I'm quite confused about the net nodal caps that are gained from HSPICE. Can anybody also tell me of the HSPICE commands to check the individual components that make up a selected nodal cap? I'm currently using .OPTION CAPTAB to obtain nodal caps.

Thanks.
 

In the regular case the extraction is an inprovement of the accuracy. If you have a schematic based netlist source/drain diffusion areas are assumed to be standard. The concrete layut could result in different diffusion areas. These areas are in the netlist as instance based area/perimeter parameter for each MOS. The parasitic caps from the wiring are added. There is no double counting. One item you should be careful is that older extractors could not extract parasitics where a device recognition layer is. That limits the accuracy somewhat if you route over devices.
 

Extraction does not include the drain/source cap. However, some old extraction tool DOUBLE count the drain/source area when you share them in the layout but use hierarchy netlist. Later HSPICE will see bigger diffusion capactance. If this is the case, either update your tool or flatten your netlist.
 

Either is Calibre or Diva there is no need for any corrections. The parasitic cap from the source/drain diffusion is extraced as annotated area/perimeter to the MOS instance. Double counting is an old problem mostly solved. Shared drain/source regions are even distributed between the devices as annotations.
 

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