Hi,
At present, I am designing a RF power amplifier. I have found a paper in IEEE entitled "Design of 2.1GHz RF CMOS Power Amplifier for 3G"(attached). Here is its schematic:
I am confused about how to model MOS transistor to calculate impdedance matching. To what extend I need to model parasitic parameters?
Thanks.
Hi, and thanks for the help.
Can you tell me how can we know the value above?
For example, now if the operating is 1.5GHz, then how can I know the parasitic resistance and Cgs?
If possible, please give me some references about this?