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How to build an IO pad cell design?

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skyismylimit

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Can any one suggest me about who to proceed with IO pad cell design...
As it has large transistors of huge width and ESD protection cicuitry,, can any one help me in telling what actually inside it and how to proceed with layout of such circuitry...

thanks in advance..

skyismylimit
 

IO pad design

Usually the foundry will provide you the layout and schematic of your IO pad which is actually two diodes.
 

Re: IO pad design

Can you give more detail? What are you trying to do? If you are doing digital stuff, pads cells are usuallly part of the library along with the standard cells. If you are doing analog, then please give some basic info about speed, voltage, output current,etc.

As for ESD your layout design rules will have a section on how to lay out output devices to protect them from ESD.

David Reynolds
 

Re: IO pad design

<basic esd and I/O design> . "EDA E-books upload/download " has the book
 

IO pad design

using two large(w/l) mos or two diodes.
 

Re: IO pad design

examine this book hope u will like it:
 

Re: IO pad design

how can we simulate this matter by hspice
thx
 

Re: IO pad design

The price of that book is much expensive,who has e-edition? who will share with everyone? Thanks!
 

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