how to balance specifications of 2 stage opamp

[fat_123]

hello,

i am designing 2-stage opamp in HSPICE

but i did not get a high PSRR value.

if i change the width and set a high PSRR value then CMRR would get low also low phase margin

how to balance all the specifications.

 

[pancho_hideboo]

Use cascade current source configuration.

 

[fat_123]

one more thing how to find slew rate and input common mode range of an opamp in hspice
'could you tell me how to take input, analysis and configuration.

 

[pancho_hideboo]

one more thing how to find slew rate and input common mode range of an opamp in hspice
'could you tell me how to take input, analysis and configuration.

Simply based on definition of them.
Learn very basic things before EDA Tool Play.

 

[t4_v]

hello,

i am designing 2-stage opamp in HSPICE

but i did not get a high PSRR value.

if i change the width and set a high PSRR value then CMRR would get low also low phase margin

how to balance all the specifications.View attachment 159047

Could you post the schematic with transistors sizes (W/L), PSRR testbench and simulation plot?