How to avoid unwanted comparator switching of flash ADC comparator?

[Ipanema]

Hi,

I'm designing a 6-bits flash ADC. The comparator that I'm using does not have "hysteresis" feature and the comparator supply are coming directly from VDD without a voltage regulator. I'm worry that noise coming from power supply will cause unwanted switching of the comparators. Should I be worry about this? or how should I ensure that the unwanted comparator switching will never happen.

Thanks.

 

[renwl]

adc comparator

what type comparator?

normally, there are no problem about that.

 

[Ipanema]

adc comparator design

The comparator that I'm using is the typical two stage opamp configuration with pmos as input. Why do you think that supply noise won't cause unwanted switching error?

Thanks.

 

[pfd001]

flash adc hysteresis

It depends on the frequency of the supply noise. The PSRR is low for this type of comparator

 

[Ipanema]

adc with comparator

How much PSRR do I need at the noise frequency?

How do I determine the noise frequency because the noise from transient simulation are just random ripple?

Thanks.

 

[renwl]

comparator in flash adc

The comparator that I'm using is the typical two stage opamp configuration with pmos as input. Why do you think that supply noise won't cause unwanted switching error?

Thanks.

If the supply noise want to cause switching error , the supply noise need go to the input and be amplified.

if the pmos is input and has positive feedback load, the effect of supply noise should be considered.

I am not sure about it. I just want to have a discussion.

 

[Ipanema]

comparator flash adc

Can you explain what is postive feedback load ?

FYI, my system main signal path switches at 1.25Gbps, while my comparator only need to work at maximum 1KHz. I'm trying to reduce the bandwith of my comparator further down as currently it has a bandwith of 100KHz. Will this help? What should be the target bandwith?

Just for clarification, attached is the comparator that I'm using without the RC compensation network.

Thanks.

 

[williamy]

sample problem for flash adc

similar two-stage comparator is used 8-bit ADC, it has not problem

 

[Ipanema]

high speed adc comparator

Thanks for the assurance. Question :

1) Do you use regulator for your comparator?

2) What is your 1LSB voltage?

Thanks.

 

[andy2000a]

high speed comparator adc flash

high speed ADC
1. pipeline
2. fold
3. flash

300MHz flash A/D can use "switch comparator" use switch Cap .. and clock
will do auto zero (cancel offset ...)

comparator use "preamp + latch " for high speed signal

you cn find many paper talk about this A/D

 

[alasliu]

basic adc comparator

why use flash you are low speed.6 bit should be no problem.but according to PSRR