Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How the CRU recover the high speed serial clk in GXB

Status
Not open for further replies.

rocking1234

Member level 1
Joined
May 2, 2009
Messages
36
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Location
India
Activity points
1,535
Hi,


The input data rate to the board is nearly 3gbps and the gxb convert this high speed serial data to 40 bits parallel data. I have looked at the gxb architeture that I found it has a CRU[clock recovery unit] that extract the high speed serial clock from the input data signal. and then the pll makes it phase shited to sync with the incoming signal. But my question is how does this CRU recover the high speed clock from the incoming data signal
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top