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How test inputs outputs (IOs) of SRAM based FPGA Virtex-5

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lahrach

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Hi friends,

Can some one suggust to how can I test IOs of FPGA with VHDL, is there some methods

Best regards
 

Hi Tricky,

I mean any test to certify that IOs are fault-free

regards
 

Do you mean electrically "fault free?" VHDL is a programming language, not a test instrument. If you want to verify that the inputs respond to the appropriate levels, and the outputs deliver the appropriate levels, speed etc, you're going to need some instrumentation.
 

Hi barry,

Thank you for your answer. I need vhdl code to verify the appropriate levels,

what are the fault models for FPGA IOs ? etc

regards,
 

Again, VHDL is not going to be able to determine anything about levels. You're going to need some instrumentation.
 

use chipscope core in your design to see the signals generated in hardware, you can see if everything is generated well or not
 

use chipscope core in your design to see the signals generated in hardware, you can see if everything is generated well or not

Chipscope will do absolutely nothing to verify signal levels on the I/Os; it will only verify internal logic.
 

Chipscope will do absolutely nothing to verify signal levels on the I/Os; it will only verify internal logic.
so what if chipscope is tracing the I/O signalS? right! in that case, it can verify what is in and out of FPGA
 

so what if chipscope is tracing the I/O signalS? right! in that case, it can verify what is in and out of FPGA

NO!

Chipscope can verify what logic signals are at the internal side of the I/O buffers, it CANNOT verify what's coming out on the pins.
 

barry, please suggest some concrete steps if you know.

THanks
 

NO!

Chipscope can verify what logic signals are at the internal side of the I/O buffers, it CANNOT verify what's coming out on the pins.
i think if the output ports are assigned to some input pins in that case chipscope can track them, I'v done this to verify the signals on Ethernet phy layer chip,
if you want to verify all by software then I think chipscope is the way to go, otherwise you need logic analyzer to verify signals.
 
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The OP asked if you can use VHDL to verify the output levels of an FPGA. The answer is no. Somehow, this devolved into an argument about chipscope. If you want to analyze the outputs of a device, you will need an oscilloscope, a data acquisition system or similar. And you cant measure rise time and voltage levels with a logic analyzer.
 

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