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[SOLVED] how should i use baud_clk as a enable signal in uart contriller module...

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sagar.bavane

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Actually, according to the codeing standerds whole module should contain singal clock.....
so in implementation of uart controller in fpga i generated baud clk but i cant use it as a clock i want to use it as control or enable signal plz give me suggesions.....
 

If the baud clock is implemented with an approximate 50% duty cycle you'll also need to perform an edge detect in your single clock domain if you want to use it as an enable, otherwise you'll have a burst of enables during the baud clock high phase.

Regards
 

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