How much will two NMOSFET with the same dimension differ?

[foreverloves]

question on mismatch

if I design two NMOSFET with the same dimension (W/L), how much will they differ from each other when they are fabricated?can one be a "slow" type and the other be "fast" type?

because I need the two transisors to match well

thank you!!

 

[safwatonline]

question on mismatch

try some matching techniques in layout, common centroid or interdigitating.

 

[jcpu]

Re: question on mismatch

foreverloves wrote

how much will they differ from each other when they are fabricated?can one be a "slow" type and the other be "fast" type?

They'll be different, in many respect:
physically mainly due to non-uniform ion implant concentrations,
and electrically Vth, Leff, Idsat,...shall be slightly different.
(~1%)

Say we are looking at mismatch of Gm, that shall also be function
of W, L, Vgs-Vth,... and layout style of cource.

Try to obtain "Matching report" from fab.

 

[foreverloves]

Re: question on mismatch

thank you!!

can one be a "slow" type and the other be "fast" type?


thank you again

 

[jcpu]

Re: question on mismatch

Unlikely, by variation we include
(1) lot to lot variation
(2) long distance (>1000um) variation within wafer
(3) short distance (~10um) variation within wafer

Corner case usaually happen to (1)
where gate oxide, channel implantation vary to certain degree
which is highly unlikely to happen in (3).

For example, poly resistance can have corner value +/-30%
but matched pair can be within ~1%(1 sigma) with careful layout.

 

[surianova]

Re: question on mismatch

if I design two NMOSFET with the same dimension (W/L), how much will they differ from each other when they are fabricated?can one be a "slow" type and the other be "fast" type?

because I need the two transisors to match well

thank you!!

basically, u need larger L and common centoid layout to reduce the mismatch.

 

[leichen_gy]

Re: question on mismatch

if I design two NMOSFET with the same dimension (W/L), how much will they differ from each other when they are fabricated?can one be a "slow" type and the other be "fast" type?

because I need the two transisors to match well

thank you!!

very very unlikely you will get one slow, one fast.
those corners are to take care of absolute vairations from lot to lot, run to run.

 

[okguy]

Re: question on mismatch

You can read the book of Razzavi p.465.

Their VT will different by : Tox / sq(W.L) with Tox in nm (Cf your model card)

W and L will also vary a little, but less than Vt.

OkGuy

 

[laglead]

Re: question on mismatch

if I design two NMOSFET with the same dimension (W/L), how much will they differ from each other when they are fabricated?can one be a "slow" type and the other be "fast" type?

because I need the two transisors to match well

thank you!!

Transistor may have distinctly different performance from die to die.
But close-spaced transistor on the same die will have almost the same characteristics, i.e. "fast" and "slow" will not happen on these transistors.

 

[foreverloves]

Re: question on mismatch

thank you !!!!!!!!!!!!!!

 

[lovseed]

Re: question on mismatch

foundry mismatch characterization report gives you how much Vt and Gm vary for different W*L. you can refer to the data and include the worst case variation in your simualtion.

But I am wondering the result will almost the same to keep one fast and the other slow, because fast/slow corner is design to represent the process variation.

So the safest way is to have W*L enough if you care about Ids variation.

 

[wdd]

Re: question on mismatch

you need focus on layout

 

[ebalboni]

Re: question on mismatch

To get the best result:
1: Use large area devices. For example dont use a 1um x 0.18um instead use a 10um x 1.8um. The larger the area the better they will match.
2: Make sure to scale W & L so the are deeply in saturation. This typically means that W should not be too large relative to L and that the Vgs overdrive should be large.
3: Best matching for devices placed next to each other with dummy devices on outside edges. Better matching will result if you interdigitate multifinger devices.