how much variation in trace length of diffrential signal is tollerable..??

[jbisht]

how much variation in trace length of differential signal is tolerable..for both normal signals and high speed signals ( like the one used in gigabit ethernet )...?

is 100MIL difference acceptable...?

IS routing of these two differential signal ok( as in attachement )

 

[FvM]

Gigabit ethernet is using 250 Mbit/s data rate on each differential pair and still slow compared to real Gbit interfaces (SATA, PCIe, USB3). It's quite normal, that curved differential pairs have a certain length mismatch, which results in a small differential to common mode conversion. It should be tolerable and preferable compared to placing additional vias.

 

[jbisht]

Thanks

and what's the tolerable range for pci-express differential signals .....??

 

[FvM]

what's the tolerable range for pci-express differential signals .....??

The PCIe electromechanical specification V1.0 tells:

The skew within the differential pair gives rise to a common-mode signal component, which can, in turn, increase Electromagnetic Interference (EMI). The differential pair should be routed such that the skew within differential pairs is less than 5 mils for the add-in card and 10 mils for the system board.

I think the rather rigid specification is mainly intended to avoid EMC problems.