How much should the error amplifier'gain be?

[jefferson]

error amplifier op amp regulation

Hi,every.
You know that a LDO need an error amplifier(EA) to rgulate the Vout, the DC gain of EA and its bandwidth influence the line regulation and load regulation and PSRR and so on.
My LDO use an EA whose DC gain is about 60dB,UGB is 10M Hz. The whole loop DC gain is 68dB, but UGB is only 200K Hz.
The LDO has a bad line regulation and a bad load regulation.

What's the problem? the DC gain too low?or the bandwidth too small?

Any reply would be appreciated.

 

[electronrancher]

bad load regulation error amplifier

if your loop gain is really 60db, then the percent output error due to the error amplifier is 1/1000 of VOUT. Anything else is due to something else.

Try looking at the reference voltage during line and load sweeps. do you really see a difference in the voltage at the op amp terminals? if that voltage is greater than 1/1000 of the ouput error, either your amp does not actually have 60dB gain or you have another problem like headroom issues.

 

[pfd001]

For load regulation, maybe your gain is not enough when the LDO works in the load conditions

 

[jefferson]

if your loop gain is really 60db, then the percent output error due to the error amplifier is 1/1000 of VOUT. Anything else is due to something else.

Try looking at the reference voltage during line and load sweeps. do you really see a difference in the voltage at the op amp terminals? if that voltage is greater than 1/1000 of the ouput error, either your amp does not actually have 60dB gain or you have another problem like headroom issues.

The loop gain simulated is really above 60 dB(maybe infact it doesn't reach this number?).I can't see if there is a voltage difference at the opamp terminals.
You mean headroom problem?I think headroom problem is about dropout voltage.Even if the Vin is high,line regulation is no good.

A phenomena is that when the Rload is light (Iout is small),the line regulation is good.Maybe the loop gain is still no enough?

 

[electronrancher]

no, if you simulated the ac response correctly, and your gain is really 60db you should have no line/load reg problems.

to simulate ac response, put a 1v ac source in the FB line. Measure from the negative terminal to the positive terminal of the ac source. Let's say your resistor divider connects to FB, and your opamp terminal is called VN. Usually FB is attached directly to VN. Now we split it with an AC source. The gain is db(V(VN)/V(FB)).

Run an AC sim at several different loads. If your AC gain is really 60dB, you probably have a problem with headroom - ie: the PMOS gate needs to be pulled down to 1v, but due to some stacked cascodes, the error amp can only pull down to 1.5v. this will cause load reg problems.

 

[szekit]

your load is loading down your gain? trying testing it with different loads.