how much is the output load we should add when simulation?

[didibabawu]

I want to know when we doing simulation ,how much is the output capacitance we should add to the analog output which we will connect to the outside of the chip and do some test? 10PF,20pf,or more?

3X!

 

[ricklin]

This depend on your package and your PCB design. For some bonding model claimed, the cap can be 2~4pF, and PCB trace may be several to 10 pF, and your test probe need to be considered, this might be 10pF if you don't use an active probe.

 

[A_U_J]

Yoi should be able to get this information from the applications group.Ideally we need to model the path from chip output to another chip input including the transmission line traces.