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How many states can FPGA's pins export?

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Nope, not in any FPGA I know of at least. Of course they have different IO standards (different voltages, slew rates, drive strength...) and some have configurable weak pullups or bus-hold circuits, but those things can't be changed on-the-fly in your HDL code.

So "1", "0" and "Z" (output driver off) it is...
 

YOu'd better check it in each fpga's datasheet.
 

i think there are only three kinds : 0 ,1 and z. by the way , tristate is used in top design files in Altera's FPGA.
 

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