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How many MOS transistors are required to implement full adder?

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Chinni_001

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Hai,

I am trying to implement full adder logic with the below 10 transistors circuit. I am using 180 nm technology. I am getting sum values properly. But observing some voltage degradation with respect to the Carry values. 1.jpg

Could anyone help me regarding what could be the possible reasons for this degradation w.r.t Carry values, and how I can resolve these issues.

Thanks and Regards,
Chinni
 

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