How long does analog IC circuit design take

[philcorb]

This may be slightly broad, or off topic, but how can one estimate the time a circuit will take to design? I have heard various estimation methods, such as 1 week per schematic. What do you do to estimate design time? Is this something that can be learnt from experience? I'm really looking at the most abstrate ways to estimate this.

kind regards,

Phil

 

[keith1200rs]

It depends on the complexity of the design, the process and whether you have any existing circuitry you can base your design on. Designing one opamp could take a week or a month depending on the specification. Trying to come up with something very clever might take months or years.

For estimating the time I break it down into functional blocks and estimate each one, then add it up. I also add on some time for simulating the complete circuit - often each block is designed and simulated in isolation first. You also have to remember the time taken to simulate each block with temperature, supply voltage, different load conditions, process corners and/or Monte Carlo, so even a simple bit of circuitry can have quite a lot of simulations associated with it to check it meets the specification. In some cases a minor change for some reason late into the project can mean several days re-simulating everything.

I don't think I have ever designed a complete IC in less than a month and 3 months is more typical (my ICs are usually small) with maybe 6 months for the more complex ones.

Keith.

 

[goldsmith]

Hello Dear Phil
What the long time is that ? why that long time ? i designed very complicated board with 6 hours , and i thought that it is too long .
So how can i help you here ?
Best Wishes
Goldsmith

 

[volker_muehlhaus]

i designed very complicated board with 6 hours

The question was about IC design, not PCB design.

 

[goldsmith]

Oh sorry , it was misunderstanding from me , you're right .

 

[jigisha]

hello sir...
i have to make layout of wideband cascode common source LNA..which includes 3-MOSFETs, 5 inductors, 3-capacitors, and few resistors...
sir how much time it will required to prepare complete layout??

i m very new to layout design tool microwind..
please guide...
thank you..

 

[philcorb]

Keith1200rs,

Thanks for your response. This is the kind of thing that interests me. I agree that breaking down projects into smaller blocks is very important. And that top-level layout and final verification do take considerable time. Do you find you normally meet project deadlines? Do unexpected things happen? I'm looking at reasonably complex ICs, in the 100s to 1000s of schematics and schedules slipping. Perhaps there are better ways to estimate time tasks take and processes to keep to deadlines.

goldsmith,

Thanks for you contribution. PCB design sounds like it is considerably quicker

 

[keith1200rs]

Normally things go to plan, but then I have been doing it for a while.

Occasionally things go wrong, such as doing a design for a DAC I once did which looked great but near the end I found a parameter out of specification which I could not fix. So I had to ditch the whole DAC concept and start again. I was probably only a week late in the end but it was a rush to get everything done in time. Normally I play around with a few ideas (a lot of ideas in fact) early in the design and pick the most promising one or two to pursue further. Normally the bad ideas get ditched there.

When you talk of 1000s of schematics - is that pages of circuitry, so tens of thousands of transistors? If so, it is not surprising that things slip. I have done designs with tens of thousands of transistors but they have had significant repetition so they aren't as complex as they sound. The biggest problem is if you have a few thousand transistors in an ADC for example, the final simulation times can be a problem. I can end up having to run them over night and also using two computers - one running the slow simulations while I work on other parts of the design on another.

How many people are involved in the design?

Keith.

 

[checkmate]

I guess there are no easy answers.
It depends on designer competence, familiarity with tools/process, circuit complexity, circuit uncertainty, amount of reusability, computing resources available, how tight the specs are etc.

Usually, the designer themselves is in the best position to give their estimated schedule. Even then, it may go way off in the event of unexpected issues. The estimate just gets better as the designer gets more experienced.

 

[philcorb]

keith1200rs,

I know the feeling of finding something last minute in verification -- it's a real pain, especially when it's something that should have been spotted earlier. I've kicked myself a few times, when problems have been found late (nearly always to do with interface between blocks or misunderstandings between designers, especially analogue-digital)! I work in a design team working at SoC level integration projects, to give a sense of scale. I'm on the lookout for improvements in schedule and any advice on that. It often hard to see where all the time has gone. Certainly having computing power, especially in the analogue world, is important. With that is the need to have sufficient licenses so no bottlenecks in that area either.

checkmate,

I completely agree. This might be a controversial statement, but is there a limit to the abilities of an experienced designer in estimating time? I mean to say, is it actually possible for anyone, experienced or otherwise? Or do people often underestimate regardless of experience? The old saying, 'Things take twice as long as you expect!' I would be interested to hear your thoughts.

 

[keith1200rs]

Some people, even very good designers are rubbish at estimating timescales to do things. When I used to run a design team I would ignore the time estimates of some designers because I knew they always underestimated, so I used my own estimates. Now I freelance on my own so I don't have that problem any more.

Keith.

 

[dick_freebird]

I am almost never right when I estimate effort and schedule.
And it's not like I haven't had plenty of practice.

 

[philcorb]

Thanks everyone for your contributions

dick_freebird, thank you for your input and being so honest.

It does seem quite a challenge, estimating how long a design will take. Is there anything you have learnt from your experience which has helped you estimate effort and schedule better? I think this is an important industry issue. Are there principles we can all apply to estimate time schdule better?

 

[keith1200rs]

While there can be an issue with estimating time, I think projects are actually more often late for other reasons. This isn't specific to IC design. Two reasons are:

1. Perfectionism

If a block or sub-circuit meets the specification, use it and move on. All too often people think, "it's ok but it could be better" and carry on trying to improve the design. If it meets the specification then it is time to move on to the next bit. People concentrate on the technical aspects of the design not the deadline.

2. Abandoning bad designs

Not necessarily "bad" but a design idea that isn't going to meet the specification. Even if you have spent weeks on something, if it then becomes clear that it is not going to work, give up and start again on a new concept which stands a chance of working. The longer you carry on with a concept that isn't working the more the project is slipping.

These are common problems I have seen across many disciplines, from mechanical engineering to software as well as electronics design.

Keith.

 

[philcorb]

Thanks everyone for your contributions. I feel that I'm starting to get an understanding on estimating time. Both perfectionism and abandoning bad designs are forms of wasted time. The goal seems to be to remove the wasted time. Perhaps it can be summed up as 'OK is good enough' and 'give up early'. I wonder if anything else can be added to this list?