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How HDL style converts to particular RTL synthesized circuit

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davyzhu

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HDL Synthesis to What

Hello all,

I am an Verilog/VHDL newbie, when I write it, I can not image what digital circuit will HDL be Synthesised to, can you recommand some ref on it?

BTW, I use FPGA for test, and I have ISE and Synplicity.

Regards,

Davy Zhu
 

Re: HDL Synthesis to What

Hi,
Better approach to design any ckt is to design hardware on paper first and then write code according to your paper design.
This method will help you to visualize the hardware that will be generated after synthesis from already developed code.
For book, I will search and let you know.
 

HDL Synthesis to What

you can read a very useful book named "Verilog HDL Synthesis Practica Primer". it is free download in this forum.
 

HDL Synthesis to What

HDL stand for hardware description language that can be synthesized into register transfer level (RTL) design. There are quite a number of third party synthesis tools available in the market: symplicity, leonardo spectrum, precision,... Anyway, you can use your ise to perform synthesis too. remember to install the latest service pack best timing calculation and optimization. regarding to the book, i recommend "hdl chip design" by smith douglas.
 

Re: HDL Synthesis to What

Hello,

The best way to experience how HDL style converts to particular RTL synthesized circuit is the document from chip manufacturer about HDL Coding Style. Most FPGA OEM's publish this kind of document for general coding guidelines as well specific guidelines for example doing state machines. These guidelines can be used as general reference as good design practice but they also have buried information about the architecture specific programming for an optimized design.

Along the same lines, EDA tool designers also publish documents that bridge between HDL coding style and resulting synthesis for a particular device architecture.

In the end, the best approach is to write small modules and see how the RTL came. The more you experience with such excercises more working knowledge you would develop about your synthesizer. As a result you would develop an understanding what would be the end schematic for a particular piece of code and then you would become a programmer and would seldom look at the RTL.

This is the essense of HDL i.e., you want to get away from IC integration and circuit building blocks. That means you write the behavior of design using a Hardware Description Language that can be accomplished with a number of ways using primitives.
 

Re: HDL Synthesis to What

Hi I am also a newbie to FPGA

so far I have been using XST and Synplify as synthesizer.

In Synplify, you can take a look at the "RTL View" which visualize your design. Better try this with a small design.
 

Re: HDL Synthesis to What

you can read some books.You should have some ideas about the circuit satisfying your spec before coding. So some fundamental circiuts and related HDL code should be known.
 

Re: HDL Synthesis to What

Hi,
As I see, you want to work with xilinx FPGAs.
There are many guides in Xilinx website (and also in ISE directory) that reperesent which HDL codes better converterted (synthesized) to designated logic architectures.
Also each synthesizer like synplify or leonardo or FPGA express comes with a PDF that describes which structures better synthesized to logic circuits.

Kasra
 

Re: HDL Synthesis to What

you can try to synthesize your code into detailed circuits,

if you can't do so, maybe you should review some basic

digital design books to refresh your memory.

best regards




davyzhu said:
Hello all,

I am an Verilog/VHDL newbie, when I write it, I can not image what digital circuit will HDL be Synthesised to, can you recommand some ref on it?

BTW, I use FPGA for test, and I have ISE and Synplicity.

Regards,

Davy Zhu
 

HDL Synthesis to What

HDL is synthesized to gate netlist. u can see the circuit architecture after synthesis using schematic viewer tools in synthesis tools.
 

Re: HDL Synthesis to What

Read any basic synthsis book.
Try to understand the example rtl codes for basic digital blocks like Flops, Latches, Muxes and try to visualise the implication of each statement on the synthesis.
Try to get the difference in the rtl lines and compare the example synthesised logic and see if you can understand why this is happening.
 

Re: HDL Synthesis to What

you can read a very useful book named "Verilog HDL Synthesis Practica Primer".
 

HDL Synthesis to What

It is suitable that the "The advanced synthysis technology" or you may read the DcUltra manual, Only It is a huge hard job.
 

Re: HDL Synthesis to What

you should study some basic digital knowledge

before studying verilog hdl.

best regards




davyzhu said:
Hello all,

I am an Verilog/VHDL newbie, when I write it, I can not image what digital circuit will HDL be Synthesised to, can you recommand some ref on it?

BTW, I use FPGA for test, and I have ISE and Synplicity.

Regards,

Davy Zhu
 

Re: HDL Synthesis to What

" VHDL for programmable logic " by the author "kevin skahil" is an excellent book

which contains a good disscussion of ur question.


good luck.
 

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