davyzhu
Advanced Member level 1
HDL Synthesis to What
Hello all,
I am an Verilog/VHDL newbie, when I write it, I can not image what digital circuit will HDL be Synthesised to, can you recommand some ref on it?
BTW, I use FPGA for test, and I have ISE and Synplicity.
Regards,
Davy Zhu
Hello all,
I am an Verilog/VHDL newbie, when I write it, I can not image what digital circuit will HDL be Synthesised to, can you recommand some ref on it?
BTW, I use FPGA for test, and I have ISE and Synplicity.
Regards,
Davy Zhu