How FPGA receive real signal

[klong19]

Hello everybody,
I'm a beginner with FPGA.

I'm using FPGA cyclone IV-E to make a numerical feedback controller. To do this, my FPGA must receive a real signal from a current sensor and compare it with a reference signal.

Here are the question I can not find in internet
- Is there an ADC inside the FPGA to numerize my real signal ? What is its name ?
- FPGA will use what type of variable (real, std_logic_vetor, ...) to represent the real signal ?
- FPGA will use ony one pin to receive the signal or one pin can only receive one bit and we must use several pins ?

I'm very grateful to you who gives me a hint.

 

[syedshan]

Hi Klong19!

Best of Luck for your learning

Is there an ADC inside the FPGA to numerize my real signal ? What is its name ?

There is no ADC inside the FPGA, you can integrate it with the FPGA and then transfer data from ADC to FPGA. (I haven't done this yet so I cannot assist more on this any ways good luck.

FPGA will use what type of variable (real, std_logic_vetor, ...) to represent the real signal ?

To communicate you use ports, they are usually type bit or std_logic if you are using VHDL and if using verilog then reg or wire. FPGA programming is not conventioanl computer programming so you will be dealing with binary digits, so if you have decimal 12,
you will be looking at it as binary 1100 etc.

FPGA will use ony one pin to receive the signal or one pin can only receive one bit and we must use several pins ?

Of course 1 pin for one signal 'at a time'... I think you should look at this website www.FPGA4FUN.com

Bests,
Shan

 

[klong19]

Thanks Shan.

There is no ADC inside the FPGA, you can integrate it with the FPGA and then transfer data from ADC to FPGA. (I haven't done this yet so I cannot assist more on this any ways good luck.

To communicate you use ports, they are usually type bit or std_logic if you are using VHDL and if using verilog then reg or wire. FPGA programming is not conventioanl computer programming so you will be dealing with binary digits, so if you have decimal 12,
you will be looking at it as binary 1100 etc.

So, for example if the real signal (from current sensor) is 126.89A, I have to use one ADC outside the FPGA to convert it in a serie of binary bits. I suppose that is a series of 12bits, then I will use 12 pins of one port of FPGA to read these 12bits, under type std_logic for every bit. That's right ?

And then, to do the maths operation (+,-,*,/) with this signal, I will manipulate bit by bit ?

I think you should look at this website www.FPGA4FUN.com

Thank you for the link, not read it yet but it seems to be good for me.

 

[TrickyDicky]

So, for example if the real signal (from current sensor) is 126.89A, I have to use one ADC outside the FPGA to convert it in a serie of binary bits. I suppose that is a series of 12bits, then I will use 12 pins of one port of FPGA to read these 12bits, under type std_logic for every bit. That's right ?

And then, to do the maths operation (+,-,*,/) with this signal, I will manipulate bit by bit ?

You can use the std_logic_vector type for the whole bus, and if you want to do arithmatic with it, you should use signed or unsigned type instead (for VHDL).

 

[syedshan]

Hi,

Well you just take std_logic_vector(11 downto 0) this will make the 12 bit input port for you.
and rest is as you said.

But it is not that simple as you stated, of course the primary thing is the same, but there are other factors involved like controlling and start/stop bits etc...

In google search for such examples they might help you more ( since I have little experience of using ADC with FPGAs )

Bests,
Shan