Dec 1, 2006 #1 R rayudu419 Newbie level 5 Joined Feb 9, 2006 Messages 9 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,329 hello Can any body help me how exactly the calculation of CRC is implemented in Hardware I am planning to improve the design of CRC? please give ur suggessions to improve design
hello Can any body help me how exactly the calculation of CRC is implemented in Hardware I am planning to improve the design of CRC? please give ur suggessions to improve design
Dec 1, 2006 #2 E echo47 Advanced Member level 6 Joined Apr 7, 2002 Messages 3,933 Helped 638 Reputation 1,274 Reaction score 90 Trophy points 1,328 Location USA Activity points 33,176 CRC implementation It's a shift register plus a few XOR gates and maybe some steering logic. Here is a Xilinx app note example: "IEEE 802.3 Cyclic Redundancy Check" **broken link removed**
CRC implementation It's a shift register plus a few XOR gates and maybe some steering logic. Here is a Xilinx app note example: "IEEE 802.3 Cyclic Redundancy Check" **broken link removed**