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how does victim net drive strength affect magnitude of a glitch

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roshan12

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when talking about glitches and crosstalk in interconnects it is said that the magnitude of the glitch is dependent on the drive strength of the victim net.

"Victim net driving strength: The smaller the output drive strength
of the cell driving the victim net, the larger the magnitude of the
glitch." -

Kindly explain why is it so...
 

think about it this way: victim and aggressor are fighting each other to see who affects who.

if the victim is driven by a small transistor, it means a switch in the aggressor net is relatively larger with respect to the victim. it will cause a high-magnitude glitch. On the other hand, if the victim is driven by a huge transistor, the aggressor will barely affect it. All of this is related to the effective C between the nets and how fast it can be charged/discharged.
 

think about it this way: victim and aggressor are fighting each other to see who affects who.

if the victim is driven by a small transistor, it means a switch in the aggressor net is relatively larger with respect to the victim. it will cause a high-magnitude glitch. On the other hand, if the victim is driven by a huge transistor, the aggressor will barely affect it. All of this is related to the effective C between the nets and how fast it can be charged/discharged.

I understand that the magnitude of a glitch is related to the drive strength or slew rate of the aggressor. But I couldn't understand clearly the effect of victim net drive strength on glitch height. It is said in the book: "Static Timing Analysis for Nanometer Designs" and I quote
"The smaller the output drive strength
of the cell driving the victim net, the larger the magnitude of the
glitch."

Would you shed some light on the reason for this behavior?
 

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I suggest to sketch an equivalent circuit. You have:

1. the aggressor, which can be modeled as a voltage step with specific dv/dt.
2. a crosstalk capacitance C
3. the victim net, which can be modeled as a voltage source with output impedance R.

You get a glitch magnitude which is roughly dV/dt * C * R (for glitch magnitudes small compared to the aggressor voltage step).

Now realize that drive strength is just an equivalent of driver output impedance.
 

I understand that the magnitude of a glitch is related to the drive strength or slew rate of the aggressor. But I couldn't understand clearly the effect of victim net drive strength on glitch height. It is said in the book: "Static Timing Analysis for Nanometer Designs" and I quote
"The smaller the output drive strength
of the cell driving the victim net, the larger the magnitude of the
glitch."

Would you shed some light on the reason for this behavior?

think about the value of the coupling cap with respect to the output pin cap. you have one small cell, small driver, small cap. or you can have one big cell, big driver, big cap. that is enough to understand the problem, although R also comes into play.
 
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