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How does this circuit work?

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Fractional-N

Fractional-N

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12_1250412328.jpg


it is said that this circuit is a dynamic SR-flip-flop.
can you tell me how does this circuit works as a dynamic SR-flip-flop, AND, can you tell me what is those two input and output displayed in the image by red circle?

reference: The use of stabilized CMOS delay lines in the digitization of short time intervals - Circuits and Systems, 1991., IEEE International Sympoisum on

thank you :)
 

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