how does SPI protocol has higher throughput than I2C?

[kaushikrvs]

how does SPI protocol has higher throughput than I2C? Is it just because there is no need for the master to check for the acknowledgement of slave; so it can keep on transmitting data?

 

[hobbyckts]

It is not limited to 8-bit words so you can send any size with content and purpose. SPI does not define any speed limit; implementations can go over 10 Mbps. I²C is limited to 1Mbps in Fast Mode and to 3.4 Mbps in High Speed Mode – this last one requiring specific I/O buffers (not easily available)

 

[KlausST]

Hi,

additionally:
* SPI is full duplex, I2C is half duplex
* SPI has fast hardware addressing, I2C has addressing per protocol (slow)

Klaus

 

[kaushikrvs]

My question was why is it 8 bit words in i2c not in spi?

If I have an 8 bit shift register in both master and slave then the spi is also restricted for 8 bit words only. So there is no benefit over i2c?

 

[betwixt]

Re: My question was why is it 8 bit words in i2c not in spi?

Possibly not in terms of the size of a single data transfer but SPI is flexible in data size and can be 'daisy chained' and can be much faster. Also SPI has a hardware addressing scheme where I2C is part hardware and part software so some bits in I2C are reserved for the device address field. In most cases, the only time I2C is better than SPI is when there are only two lines available to send and recieve data.

Brian.

 

[KlausST]

Re: My question was why is it 8 bit words in i2c not in spi?

Hi,

SPI usually is 8 bits, too.
But because of it´s hardware you could use any other bit width, too.
Additionally you could adjust bit width with any selected device. No need that all devices at one SPI bus use the same bit width.
But I recommend to keep on 8 bit width, if possible. Just for tracability and compatibility. (Unfortunately some devices need other bit width than 8)

With I2C you have a specified protocol. Any device at the bus has to comply with it.

Klaus

 

[KlausST]

Hi,

So there is no benefit over i2c?

The benefits are already explained.

And it is said, that "it is not limited to 8 bit words".
So if you decide to use 8 bits, then you are responsible for that decision.

And with one 8 bit shift register... no one says you must not transmit two or more 8_bit_words following each other.


Klaus

 

[kaushikrvs]

Is SPI implemented in chips or on hardware boards such as microprocessors?

I Know that it is a communication protocol but is it communication between different blocks in a chip or communication between different chips on a board?

 

[FvM]

SPI is Serial Peripheral Interface Bus, invented for inter chip communication by Motorola. Although not impossible in principle, it makes little sense to use it inside a chip.

https://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

 

[pjmelect]

The main reason that I2C is slower than SPI is because the I2C has open collector outputs thus it is limited in speed to the value of the pull up resistor and the capacitance of the bus lines. The value of the pull up resistor is limited by the drive capability of the I2C device. SPI does not have this limitation as it has a totem pole driver.

 

[Aussie Susan]

Another aspect is to consider is what exactly you mean by 'throughput' in a particular context.
If you always want to exchange values between the master and the slave then SPI will probably win out as that is exactly how it is designed to work.
However, if you need to send a command to the slave to tell it what to send, then you will need 2 exchanges - one for the command and one for the data. I this situation you are very close to how I2C works.
If the slave will take time to respond to the masters request then you might need to either add in some hardware lines so the slave can tell the master that it is ready or the slave must respond with some "not yet ready' value for (perhaps) multiple exchanges until it has the required value - remember that the master always initiates the SPI exchanges and the slave has no way to slow them down or stop them. This could be seen as lowering the throughput of the overall system.
I2C has a possible advantage in this situation is that the slave can employ 'clock stretching' if it is not ready.
Therefore you can't look at just the lowest level protocol (the hardware level) when determining throughput - you need to look at the higher level protocols that you design over the top of the hardware.
Susan