The tristate buffer is not a signal.alexz said:It does not work on both directions.
I have tried to simulate a tri state buffer, and it works only as an output
tkbits said:To get valid DBUS signals, 1) all outputs must be from tristate buffers, and 2) exactly one output must be active (non-Z).
well i think u will understand by this example...
when ever u use some output pins which are again feed back to ur input side then we generally use inout pins..
entity sr_latch is
port( s,r : in std_logic;
q,qb : inout std_logic);
archetecture behv of sr_latch is
q <= s nand qd;
qb <= r nand q;
in case of the above example ( sr latch)..we take qb output pin to again as an input pin at the nand gate input...this is where inout pin we use generally...
X generally means you forgot to initialize your registers to a specific value. So either use an init value for registers, OR assert the reset in your modules.