How does I/O design differ from std cell design?

[kumar_eee]

How I/O design differs from std cell design?.

 

[ericyuan]

I/O Design

reliablity?

 

[kumar_eee]

Re: I/O Design

not only reliability.. In terms of circuit design & layout....

 

[ericyuan]

I/O Design

area? performance? and DFM

 

[kumar_eee]

Re: I/O Design

Dear ericyuan, I have no idea about I/O design.. since I'm working in std cell layout, I just want to know How the I/O's layout differs from std cell.

 

[joe2moon]

Re: I/O Design

Major differences might be
- ESD (Electrostatic Discharge), and
- Driving capability.
=====================================

 

[kumar_eee]

Re: I/O Design

Thanks to all those who are replied... Is there any differences in Layout?.. I heard that in I/O layout we will be using more metals ( M1, M2, M3...M7)... Is it so?.

 

[ravichandra]

Re: I/O Design

Yes, I/O's will have till top level metal layers reason is ...
in I/O's we will have PAD and power busing which uses top level metals
its not only till M7, it depends on technology your using

 

[layoutmaster]

I/O Design

Kumar, depending on the process you can have M1, M2... etc.

As posted before, usually whichever is your higher metal (named MT or Metal Top) is the one that will be thicker and, as a direct consequence, will have the biggest current density between all the rest, that's why it will be your natural choice for driving high output currents and your chip's power lines. Also, based on the same reason, and also because it's the highest one, this is the metal used for creating your chip bonding pads.

 

[sunjimmy]

I/O Design

The main focus on general-purpose of I/O design is reliability. Like ESD and Latch-up. The circuit design and layout concepts are almost around these 2 topics. Unfortunately, the reliability issues can't be simulated by Spice. Although the design and layout guidelines are provided by foundary documents. but in real situation that's not enough. There are more and more issues related to whole-chip ESD design scheme especially in deep-submicron process.
There are many useful ebooks talking about these issues on the forum. You may search them by yourself. There are many experts on the forum, if you can narrow down your question on specific range or topics. That will be easier to answer it !
Besides, there are many useful papers in IEEE JSSC journal. You can google them easily.
Hope it helps

 

[she_long]

Re: I/O Design

Major differences might be
- ESD (Electrostatic Discharge), and
- Driving capability.
=====================================

I think I/O is not only about the ESD/Driving capability, but also include the signal's direction (input, output, input/output), Level shift between different power domain, the Pin's statue when no signal connected (sames must weak pull up or pull down), and so on.